The present invention relates to a solid-state imaging device, and in particular, to a solid-state imaging device capable of improving sensitivity without causing a rise in depletion voltage and shutter voltage.
In recent years, solid-state imaging devices are demanded to have a performance of high sensitivity throughout a wide range of wavelength. FIG. 7 shows a sectional view of a conventional solid-state imaging device (Japanese Patent Laid-Open Publication No. HEI 5-183184). This solid-state imaging device is formed as follows.
In the above-mentioned solid-state imaging device, practically a P-type epitaxial layer is formed directly on the entire surface of an N-type Si substrate 1. For the sake of comparison with the present invention, it is assumed that an N-type epitaxial layer 2 is formed on the entire surface of the N-type Si substrate 1 at an impurity concentration approximately equal to that of the N-type Si substrate 1. It is to be noted that this arrangement has neither direct relation to the present invention nor any problem since a NonNsub substrate is generally employed as an N-type substrate in the recent CCD (charge coupled device).
Next, a first P-type epitaxial layer 3 is formed on the entire surface of the N-type epitaxial layer 2 by epitaxial growth, and an N-type epitaxial layer (light-receiving N-layer) 4 is formed on the entire surface of the first P-type epitaxial layer 3. Subsequently, boron ions are implanted into regions other than a light-receiving region 7 with an energy of 500 keV to 10 MeV, forming a second P-type layer 5 that reaches the first P-type epitaxial layer 3. Subsequently, a transfer channel layer 8 that becomes a charge transfer region 6, a channel stop region 9 for the separation of individual pixels, a transfer gate region 10 for transferring electric charges from the light-receiving region 7 to the charge transfer region 6 and a P+ region (light-receiving P-layer) 11 for reducing the interface state level of the surface of the light-receiving region 7 are formed by ion implantation.
A silicon oxide film 12 that serves as a gate insulator is further formed on the entire surface of the aforementioned layers. A silicon nitride film 13 that serves as a gate insulator and an N+ polysilicon gate electrode 14 that serves as a transfer electrode are formed in the portions other than the light-receiving region 7. An interlayer oxide film 15 that serves as an insulator is formed on the above layers, and thereafter, a light-shielding film 16 is formed so as to cover the portions other than the light-receiving region 7. A flattening film 17 of BPSG (boro-phospho silicate glass) or the like is formed to flatten the surface, and finally an overcoat (passivation film) 18 of a silicon nitride film or the like is formed, obtaining the aforementioned solid-state imaging device.
However, the aforementioned conventional solid-state imaging device has the following problems. That is, in order to increase the sensitivity, the first P-type epitaxial layer 3, which is the barrier region between the light-receiving N-layer 4 and the N-type substrate 1, is formed in a deep region apart from the substrate surface i.e. the outside surface aiming at increasing the depth of a photoelectric conversion region in the light-receiving region 7, and the light-receiving N-layer 4 is formed by N-type epitaxial growth.
Accordingly, this solid-state imaging device has the problem that it is difficult to make contact of the N-type substrate 1 from the substrate surface. Furthermore, since the light-receiving N-layer 4 and the first P-type epitaxial layer 3 are formed by epitaxial growth, it is difficult to control the impurity concentration by comparison with the case of the formation by ion implantation. Therefore, it is difficult to control the quantity of electric charges (photodiode capacitance) that can be accumulated in the light-receiving region 7, a voltage (depletion voltage) for completely reading out the electric charges accumulated in the light-receiving region 7 to the charge transfer region 6 and a voltage (shutter voltage) for completely sweeping out the electric charges accumulated in the light-receiving region 7 toward the substrate. In other words, there is the problem that the quantity of the accumulated electric charges in the light-receiving region 7, the depletion voltage and the shutter voltage vary.
Furthermore, in order to accumulate electric charges in the light-receiving region 7, the light-receiving N-layer 4 is required to have an impurity concentration (hereinafter referred to simply as a concentration) of not lower than 1xc3x971015 cmxe2x88x923. However, the light-receiving N-layer 4 is formed by the N-type epitaxial growth method, and therefore, a high-concentration N-type epitaxial layer broadly expands to a deep portion of the substrate as indicated by a region B shown in the concentration profile of the cross section A-Axe2x80x2 in FIG. 8. Consequently, a deep potential region broadly expands in the deep portion of the substrate as shown in the potential profile of the cross section A-Axe2x80x2 in FIG. 9. As a result, there is the problem that the depletion voltage and the shutter voltage rise.
The light-receiving region 7 is formed of the high-concentration epitaxial layer, and therefore, a P-type channel stop region 9 is formed by high-energy implantation for the separation of individual pixels. Accordingly, there is also the problem that the depth of the light-receiving N-layer 4, or the N-type epitaxial layer is limited to a depth at which separation can be provided by the P-type channel stop region 9 formed by high energy implantation.
Accordingly, the object of the present invention is to provide a solid-state imaging device capable of improving sensitivity without causing a rise in depletion voltage and shutter voltage.
In order to achieve the aforementioned object, the present invention provides a solid-state imaging device comprising:
a first impurity layer forming part of a photodiode;
a second impurity layer being formed on entire region including a portion under the first impurity layer, being of a conductive type identical to that of the first impurity layer and having an impurity concentration lower than that of the first impurity layer;
a third impurity layer being formed under the second impurity layer and being of a conductive type different from that of the first impurity layer;
a fourth impurity layer being formed under the third impurity layer and being of a conductive type identical to that of the first impurity layer; and
a fifth impurity layer being formed under the fourth impurity layer, being of a conductive type identical to that of the fourth impurity layer and having an impurity concentration higher than that of the fourth impurity layer.
According to the above-mentioned construction, the second impurity layer that is of the conductive type identical to that of the first impurity layer and has the impurity concentration lower than that of the first impurity layer is formed in the entire region including the portion under the first impurity layer that is forming part of the photodiode. With this arrangement, the high-concentration first impurity layer is formed in a region near the substrate surface, and the low-concentration second impurity layer is formed in the deeper region, so that the depletion layer formed in the photodiode is expanded to the deep portion of the substrate by the low-concentration second impurity layer. As a result, a photoelectric conversion effect on the incident light of a long wavelength is improved to increase the sensitivity. In the above case, the deepest potential portion is formed on the substrate surface side, and therefore, the depletion voltage, which is the voltage for completely reading out the electric charges accumulated in the photodiode, is prevented from rising.
Furthermore, the fourth impurity layer of the conductive type identical to that of the first impurity layer and the fifth impurity layer that is of the conductive type identical to that of the fourth impurity layer and has an impurity concentration higher than that of the fourth impurity layer are formed in a stack of two layers in a region deeper than the region in which the third impurity layer of the conductive type different from that of the first impurity layer is formed. With this arrangement, the shutter voltage, which is the voltage for sweeping the electric charges accumulated in the photodiode toward the substrate, is prevented from rising.
That is, according to the present invention, the sensitivity can be improved without causing a raise in the depletion voltage and the shutter voltage.
In one embodiment, the third impurity layer is formed excluding at least part of a non-imaging region.
According to the above embodiment, the third impurity layer of the conductive type different from that of the first impurity layer is not formed entirely or partially in the non-imaging region. Therefore, electrical contact from the first impurity layer side is made with the fifth impurity layer of the conductive type identical to that of the first impurity layer and with the lower layers via the region in which the third impurity layer is not formed.
In one embodiment, the fourth impurity layer and the fifth impurity layer are continuously formed by varying a gas flow rate in one epitaxial growth process.
According to the above embodiment, the fourth impurity layer and the fifth impurity layer are grown in one film forming process, reducing the fabricating processes.
In one embodiment, the fifth impurity layer has an impurity concentration of not lower than 5xc3x971015 cmxe2x88x923.
According to the above embodiment, the impurity concentration of the fifth impurity layer is not lower than 5xc3x971015 cmxe2x88x923. Therefore, the shutter voltage is effectively prevented from rising.
In one embodiment, the second impurity layer is formed by low pressure epitaxial growth whose growth temperature is higher than 1050xc2x0 C. and lower than 1150xc2x0 C.
According to the above embodiment, the second impurity layer is formed by low pressure epitaxial growth at a temperature lower than 1150xc2x0 C. Therefore, the shape of an alignment target provided in the third impurity layer is maintained so as not to collapse.
In one embodiment, the second impurity layer is formed by atmospheric pressure epitaxial growth whose growth temperature is not lower than 1150xc2x0 C.
According to the above embodiment, the second impurity layer is formed by atmospheric pressure epitaxial growth at a temperature of not lower than 1150xc2x0 C. Therefore, the shape of the alignment target provided in the third impurity layer is maintained so as not to collapse.
In one embodiment, the second impurity layer has an impurity concentration of not higher than 1xc3x971014 cmxe2x88x923.
According to the above embodiment, it is effectively performed to expand the depletion layer formed in the photodiode to the deep portion of the substrate and to form the deepest potential portion on the substrate surface side. As a result, the sensitivity is improved without causing a rise in the depletion voltage.
In one embodiment, the first impurity layer and the second impurity layer have impurity concentrations differing from each other by two or more orders of magnitude, and the impurity concentration of the first impurity layer is set higher than the impurity concentration of the second impurity layer.
According to the above embodiment, the deepest potential portion is reliably formed on the substrate surface side. Therefore, the depletion voltage is more effectively prevented from rising.